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Délia Boino
Submitted by dboino on 4 March 2021
Intended learning outcomes

Students who successfully complete this course unit should be able to:

  1. Knowledge of a high-level hardware description language (VHDL or Verilog) to describe and to simulate digital and mix signal circuits;
  2. Understand how to design small and medium complexity digital electronic systems, using a top down methodology including automatic synthesis and implementation in field-programmable logical devices (FPGAs and CPLDs);
  3. Understand how to design small and medium complexity analog electronic systems, with implementation in  field-programmable analog and mix signal devices (FPAAs and PSoCs);
  4. Analyze the design tradeoffs in electronics systems such as technological implementation alternatives, speed, area and cost;
  5. Design digital and analog electronic systems, using computer aided design (CAD) tools and physically implementation in field-programmable (configurable) hardware devices;
  6. Write reports defending the implemented decisions and evaluate the results.

 

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